Silicon Design Verification Engineer
Overview
Placement Type:
Temporary
Salary:
$75.75-90.35 Hourly
Start Date:
10.13.2025
We are partnering with a leading technology company at the forefront of innovation, shaping the future of digital experiences and groundbreaking hardware. This organization is renowned for its commitment to pushing boundaries and delivering world-class solutions that impact millions globally. We’re seeking a talented individual to join their dynamic team, where you will play a pivotal role in ensuring the flawless performance and reliability of cutting-edge silicon designs. Your expertise will directly contribute to the integrity of core functional blocks, enabling the creation of advanced technologies that power the next generation of products. This is an exciting opportunity to make a significant impact on critical projects, working independently and collaboratively to verify complex designs and drive technical excellence.
As a key contributor, you will dive deep into the heart of hardware development, taking ownership of end-to-end verification tasks. You’ll be instrumental in validating major functional blocks within intellectual property, applying your deep understanding of design verification and the hardware engineering process to deliver robust, verified designs. This role offers the chance to make substantial, independent technical contributions, managing your priorities and selecting the most effective methods to achieve verification goals.
**Here’s how you’ll make an impact:**
* Independently apply advanced verification techniques and methodologies to validate complex designs.
* Utilize industry-standard verification tools and languages, such as SystemVerilog, to ensure design correctness with minimal guidance.
* Develop comprehensive test plans, encompassing verification strategy, environment setup, component design, stimulus generation, checks, and coverage models, ensuring all documentation is clear and actionable.
* Collaborate closely with architecture and design teams to verify the functional accuracy of logic designs, providing critical insights and support.
* Engage with diverse cross-functional teams to debug and resolve complex failures across various domains, including hardware, software, manufacturing, and design.
**Must-Have Qualifications:**
* Proficiency in SystemVerilog (SV) coding.
* Extensive experience with simulation-based verification techniques and methodologies.
* Strong skills in scripting and developing verification infrastructure.
* Demonstrated domain-specific knowledge relevant to silicon design verification.
* Expertise in developing and utilizing testbench components and techniques.
* Proficiency in Universal Verification Methodology (UVM) coding.
* Skills in SystemVerilog Assertions (SVA) coding.
* Experience with formal verification techniques and methodologies.
* Excellent communication and comprehension abilities.
* Proven problem-solving skills.
**About Aquent Talent:**
Aquent Talent connects the best talent in marketing, creative, and design with the world’s biggest brands.
Our eligible talent get access to amazing benefits like subsidized health, vision, and dental plans, paid sick leave, and retirement plans with a match. More information on our awesome benefits!
Aquent is an equal-opportunity employer. We evaluate qualified applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, and other legally protected characteristics. We’re about creating an inclusive environment—one where different backgrounds, experiences, and perspectives are valued, and everyone can contribute, grow their careers, and thrive.
Client Description
As a Silicon Design Verification Engineer, you complete end-to-end tasks that are integrated into an overarching project, with minimal assistance from more senior team members. You make larger, mostly independent technical contributions by planning, managing, and executing your own priorities, selecting appropriate method(s) to most effectively achieve verification goals and objectives. You typically verify a piece of a major functional block within an IP. You demonstrate deep understanding of Design Verification and possess proficient knowledge of the hardware engineering process to deliver verified designs. Responsibilities include:
– Apply verification techniques and methodologies to verify designs, with minimal guidance (mostly independently).
– Apply verification tools and languages (e.g., SystemVerilog) to verify designs, with minimal guidance (mostly independently).
– Develop test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation can be easily understood and used, with minimal guidance (mostly independently).
– Work closely with architecture and designers to help verify the functional correctness of the logic design with minimal guidance (mostly independently).
– Collaborate with cross-functional teams to debug failures (e.g., boards, software, manufacturing, design, thermal issues).Minimum role qualification requires proficiency in:
– SV Coding Skills
– Simulation-based Verification Techniques, Methodology, and Experience
– Scripting and infrastructure
– Domain specific knowledge
– Testbench components and techniques
– UVM Coding Skills
– SVA Coding Skills
– Formal Verification Techniques, Methodology, and Experience
– Communication and comprehension
– Problem-solving